o: ActiveSupport::Cache::Entry :@compressedF: @value"y"s
main.h
3 3 

  		




  4
  4
  
    
#FUSES NOWDT                    //No Watch Dog Timer


  		




  5
  5
  
    
#FUSES WDT128                   //Watch Dog Timer uses 1:128 Postscale


  		




  6
  
  
    
#FUSES HSPLL                       //High speed Osc (> 4mhz for PCM/PCH) (>10mhz for PCD)


  		




  
  6
  
    
#FUSES HSPLL                    //High speed Osc (> 4mhz for PCM/PCH) (>10mhz for PCD)


  		




  7
  7
  
    
#FUSES NOPROTECT                //Code not protected from reading


  		




  8
  8
  
    
#FUSES NOBROWNOUT               //No brownout reset


  		




  9
  9
  
    
#FUSES BORV20                   //Brownout reset at 2.0V


  		




  ......




  16
  16
  
    
#FUSES NOWRTD                   //Data EEPROM not write protected


  		




  17
  17
  
    
#FUSES IESO                     //Internal External Switch Over mode enabled


  		




  18
  18
  
    
#FUSES FCMEN                    //Fail-safe clock monitor enabled


  		




  19
  
  
    
#FUSES PBADEN                   //PORTB pins are configured as analog input channels on RESET


  		




  
  19
  
    
#FUSES NOPBADEN                   //PORTB pins are configured as analog input channels on RESET


  		




  20
  20
  
    
#FUSES NOWRTC                   //configuration not registers write protected


  		




  21
  21
  
    
#FUSES NOWRTB                   //Boot block not write protected


  		




  22
  22
  
    
#FUSES NOEBTR                   //Memory not protected from table reads


  		




  23
  23
  
    
#FUSES NOEBTRB                  //Boot block not protected from table reads


  		




  24
  24
  
    
#FUSES NOCPB                    //No Boot Block code protection


  		




  25
  
  
    
#FUSES MCLR                     //Master Clear pin enabled


  		




  
  25
  
    
#FUSES NOMCLR                   //Master Clear pin disabled


  		




  26
  26
  
    
#FUSES LPT1OSC                  //Timer1 configured for low-power operation


  		




  27
  27
  
    
#FUSES NOXINST                  //Extended set extension and Indexed Addressing mode disabled (Legacy mode)


  		




  28
  
  
    
#FUSES PLL5                    //Divide By 5(48MHz oscillator input)


  		




  
  28
  
    
#FUSES PLL5                     //Divide By 5(48MHz oscillator input)


  		




  29
  29
  
    
#FUSES CPUDIV1                  //System Clock by 4


  		




  30
  30
  
    
#FUSES USBDIV                   //USB clock source comes from PLL divide by 2


  		




  31
  31
  
    
#FUSES VREGEN                   //USB voltage regulator enabled


  		




  ......




  33
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  34
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#use delay(clock=48000000)


  		




  35
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#use rs232(baud=9600,parity=N,xmit=PIN_C6,rcv=PIN_C7,bits=8)


  		




  36
  
  
    
#use rs232(baud=9600,parity=N,xmit=PIN_C6,rcv=PIN_C7,bits=8)


  		




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:@created_atf1436515229.406697S:@expires_in0