o: ActiveSupport::Cache::Entry :@compressedF: @value"ª"¤
README.txt
1 1
Zdrojove kody FPGA rozhrani bez placeneho Xillybus modulu a par utilit, nepsal Ondrej Syrhrovsky.
2
http://xillybus.com/
2 3

  
:@created_atf1419150320.5718989™þ:@expires_in0