o: ActiveSupport::Cache::Entry :@compressedF: @value""
Modules/CPLD_FPGA/S6AN01A/PrjInfo.txt
1
[InfoShortDescription.en]
2
  Xilinx Spartan 6  XC6SLX9T FPGA Developing Board
3

  
4
[InfoShortDescription.cs]
5
  Vývojový modul s FPGA Xilinx Spartan 6 XC6SLX9T 
6

  
7
[InfoLongDescription.en]
8
FPGA development module for basic signal and data processing. This breakout board differs from other constructions by high number of differential pairs take out to LVDS or LVPECL connectors. 
9

  
10
[InfoLongDescription.cs]
11
FPGA vývojová deska pro základní zpracování signálů. Od běžných vývojových desek se odlišuje hlavně zvýšeným množstvím diferenčňích kanálů vyvedených na konektory. 
12

  
13
[End]
Modules/CPLD_FPGA/S6AN01A/CAM_PROFI/Preview.gvp
1
(gerbv-file-version! "2.0A")
2
(define-layer! 5 (cons 'filename "V2.PHO")(cons 'visible #f)(cons 'color #(53713 6939 26728)))
3
(define-layer! 4 (cons 'filename "V1.PHO")(cons 'visible #t)(cons 'color #(54741 65021 13107)))
4
(define-layer! 3 (cons 'filename "T1.PHO")(cons 'visible #t)(cons 'color #(0 50115 50115)))
5
(define-layer! 2 (cons 'filename "M2.PHO")(cons 'visible #f)(cons 'color #(30069 62194 26471)))
6
(define-layer! 1 (cons 'filename "M1.PHO")(cons 'visible #t)(cons 'color #(49601 0 57568)))
7
(define-layer! 0 (cons 'filename "BOARD.PHO")(cons 'visible #t)(cons 'color #(29555 29555 57054)))
8
(define-layer! -1 (cons 'filename "./")(cons 'visible #f)(cons 'color #(0 0 0)))
9
(set-render-type! 3)
:@created_atf1433977710.516504g:@expires_in0